1. Field of the Invention
This invention relates to the field of data processing systems. More particularly, this invention relates to the field of adding data values.
2. Description of the Prior Art
Data processing apparatus are being developed that can manipulate more data in shorter periods of time. As the size of data values being manipulated by data processing apparatus increases, while the cycle time of the apparatus continues to decrease, it becomes increasingly difficult to perform operations such as addition in a single cycle. Thus, the addition of wider data values often needs to be performed over two cycles. This makes it difficult to perform back-to-back accumulates with no bubble (e.g. R1=A+B, R2=R1+C).
U.S. Pat. No. 5,619,664 looks at this problem and addresses it by producing a redundant form result part way through an add. This result can be forwarded to a subsequent operation (e.g. an ADD, or memory reference) to speed up the subsequent operation as it does not need to wait for the final result, in some cases. In the case of the second operation being an add it performs a carry save addition on two data values that are to be added together and then if a third data value is to be added it feeds the intermediate sum and carry from the carry save addition back into the carry save addition circuit along with the third data value.
Other documents that consider the above problem are U.S. Pat. No. 4,868,777 and “Design Alternatives For Parallel Saturating Multioperand Adders” by Balzola et al. from “http//ce.et.tudelft.nl/publicationfiles/659—97iccd.pdf”.